与专家交流

Digital Design & Interconnect Standards

此内容需要使用支持JavaScript的浏览器和Adobe Flash Player

获得Flash 

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more

 

观看 YouTube 视频 

缩小范围

去除所有优化

行业/技术

按内容类型

1-16 / 16

排序:
了解如何分析、验证和调试高速 DDR3 存储器 
Original broadcast Oct 4, 2011

网上直播 -- 已存档的

 
Accelerate DDR4/LPDDR3 Memory Debug with Bus level Signal Integrity Insight Webcast 
Original broadcast March 4, 2014

网上直播 -- 已存档的

 
Accelerate FPGA Debug by Applying Latest Tools and Methods Webcast 
Original broadcast June 10, 2014

网上直播 -- 已存档的

 
Boundary Scan for Testing On-Board DDRs Webcast 
Original broadcast October 22, 2013

网上直播 -- 已存档的

 
DDR memory Characterization Using a Mixed Signal Oscilloscope Webcast 
Original broadcast October 16, 2013

网上直播 -- 已存档的

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

展览会

 
EMI/EMC Analysis for High-Speed Digital Design Webcast 
Live broadcast July 24, 2014; 10am PT/1pm ET/19:00 CET

网上直播

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

网上直播 -- 已存档的

 
Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

网上直播 -- 已存档的

 
How to Optimize Your SerDes Design During the Pre-layout Phase Webcast 
Live broadcast September 25, 2014; 10am PT / 1pm ET

网上直播

 
New Calibration Method Simplifies Measurements of Fixtured Devices Webcast 
Original broadcast July 29, 2014

网上直播 -- 已存档的

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

网上直播 -- 已存档的

 
Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

网上直播 -- 已存档的

 
Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Original broadcast May 22, 2014

网上直播 -- 已存档的

 
Tips to Debugging DDR 1, 2 and 3 Physical and Protocol Layer Issues webcast 

培训资料 2009-01-06

 
Using Logic Analysis to Find Root Cause of Digital Design Errors Webcast 
Recorded broadcast December 17, 2013

网上直播 -- 已存档的