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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more

 

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DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

展览会

 
DesignCon 2015 
Jan 27-29, 2014; Santa Clara Convention Center

展览会

 
Overcoming MIPI M-PHY Protocol Layer Test Challenges Webcast 
Live broadcast August 26, 2014; 10am PT / 1pm ET

网上直播

 
Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

网上直播 -- 已存档的

 
Test and Validation of PCIe/NVMe Protocol Designs Webcast 
Original broadcast July 10, 2014

网上直播 -- 已存档的