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Digital Design & Interconnect Standards

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

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High Precision Time Domain Reflectometry - Application Note 
Time domain reflectometry (TDR) is a well-established technique for verifying the impedance and quality of signal pats in components, interconnects, and transmission lines.

Application Note 2014-01-23

Measuring Jitter in Digital Systems (AN 1448-1) - Application Brief 
This application note is for R&D designers and engineers working on high-speed digital designs. It addresses jitter measurements in digital circuits, how the different measurement techniques are best applied, and how these decisions may change as the data rates increase.

Application Note 2013-09-16

PDF PDF 1.78 MB
How to Test a MIPI M-PHY High-speed Receiver - Challenges and Keysight Solutions - Application Note 
This application selectively describes critical parts of the MIPI M-Phy-specification and related receiver (RX) tests. It describes the main properties of the M-Phy interface.

Application Note 2013-08-06

PDF PDF 6.63 MB
Keysight Method of Implementation (MOI) for 10GBASE-T Ethernet Cable Tests 
Keysight Method of Implementation (MOI) for 10GBASE-T Cable Tests Using Keysight E5071C ENA Option TDR

Application Note 2013-05-21

PDF PDF 2.13 MB
Method of Implementation (MOI) for HDMI 1.4b Cable Assembly Test 
Method of Implementation (MOI) for HDMI 1.4b Cable Assembly Test Using Keysight E5071C ENA Network Analyzer Option TDR.

Application Note 2013-04-24

PDF PDF 2.02 MB
MOI for DisplayPort PHY CTS 1.2b Source Testing  
This document is provided "AS IS" and without any warranty of any kind, including, without limitation, any expressed or implied warranty of non-infringement, merchantability or fitness for a particular purpose. In no event shall VESA™ or any member of VESA be liable for any direct, indirect, special, exemplary, punitive, or consequential damages, including, without limitation, lost profits, even if advised of the possibility of such damages. This material is provided for reference only. VESA does not endorse any vendor’s equipment, including equipment outlined in this document.

Application Note 2013-03-21

PDF PDF 5.63 MB
MOI for DisplayPort PHY CTS 1.2b Sink Tests 
This document is provided "AS IS" and without any warranty of any kind, including, without limitation, any express or implied warranty of non-infringement, merchantability or fitness for a particular purpose. In no event shall VESA™ or any member of VESA be liable for any direct, indirect, special, exemplary, punitive, or consequential damages, including, without limitation, lost profits, even if advised of the possibility of such damages. This material is provided for reference only. VESA does not endorse any vendor’s equipment including equipment outlined in this document.

Application Note 2013-03-21

PDF PDF 7.99 MB
Jitter Measurements on Long Patterns Using 86100DU-401 Advanced Waveform Analysis - Application Note 
To overcome pattern length limitations found in many of today’s jitter analysis tools, Keysight developed a Microsoft Office Excel-based application called 86100DU Option 401 Advanced Waveform Analysis

Application Note 2013-02-21

PDF PDF 3.47 MB
Keysight Method of Implementation (MOI) for DisplayPort1.2b Cable-Connector Assembly Compliance Test 
Keysight Method of Implementation (MOI) for DisplayPort 1.2b Cable-Connector Assembly Compliance Test Using Keysight E5071C ENA Network Analyzer Option TDR

Application Note 2013-02-18

PDF PDF 1.29 MB
Keysight Method of Implementation (MOI) for MHL Cables Compliance Tests 
Keysight Method of Implementation (MOI) for MHL Cable Compliance Tests Using Keysight E5071C ENA Network Analyzer Option TDR

Application Note 2013-02-14

PDF PDF 1.76 MB
DDR4 TdiVW/VdiVW Bit Error Rate Measurement or Understanding Bit Error Rate 
Importance of making BER measurement calculations to form a statistical measurement of total jitter to understand the design's data valid window result and design error rates.

Application Note 2013-01-24

PDF PDF 1.65 MB
Keysight Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test 
Keysight Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test Using Keysight E5071C ENA Network Analyzer Option TDR

Application Note 2012-12-17

PDF PDF 1.82 MB
DDR Memory Overview, Development Cycle, and Challenges - Technical Overview 
Thanks to improved manufacturing processes that have driven down costs, the technology of choice is now DDR SDRAM, short for Double Data Rate Synchronous Dynamic Random Access Memory.

Application Note 2012-12-14

PDF PDF 1.37 MB
Frequency Domain Analysis of Jitter Amplification in Clock Channels 
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.

Application Note 2012-11-01

PDF PDF 257 KB
Keysight Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test 
Keysight Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Using Keysight E5071C ENA Network Analyzer Option TDR

Application Note 2012-10-16

PDF PDF 1.62 MB
Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow 
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.

Application Note 2012-09-21

Crossing the Digital-Analog Divide - White Paper 
This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform.

Application Note 2012-05-02

PDF PDF 6.46 MB
Oscilloscope Considerations for Multilane MIPI M-PHY Transmitter Validation 
To help improve your electrical validation, there are a few considerations in choosing the oscilloscope to validate your multilane M-PHY designs.

Application Note 2012-04-09

PDF PDF 1.10 MB
Which Electromagnetic Simulator Should I Use? 
This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each.

Application Note 2012-04-06

PDF PDF 3.21 MB
USB 3.0 Protocol Testing with Active Error Insertion Application Note 
Speed up design and verification of USB designs using the U4612A Jammer

Application Note 2012-03-19

PDF PDF 3.51 MB
S-parameter Series: Using De-embedding Tools for Virtual Probing Application Note 
Discusses using de-embedding tools to gain virtual access to difficult measurement points

Application Note 2012-03-11

S-parameter Series: S-parameter Requirements for Oscilloscope De-Embedding Applications 
A tutorial in helping the reader achieve the big picture of interoperating oscilloscope data and how to understand its relationship to S-parameters

Application Note 2012-03-02

S-parameter Series: Using the Time-Domain Reflectometer Application Note 
Time Domain Reflectometers provide digital designers with powerful tools that display traditional impedance measurements and solutions that generate accurate S-parameter measurements -for de-embedding

Application Note 2012-03-01

6 Hints for Better SATA and SAS Measurements 
These 6 Hints for better SATA and SAS measurements cover Tx, Rx, Impedance and Return Loss, and Host/Device Digital testing challenges.

Application Note 2012-02-02

PDF PDF 1.59 MB
Maximizing DDR BGA probe Bandwidth for Superior Signal Fidelity 
The use of BGA probes for probing DDR DRAM is becoming more popular and almost a requirement as memory design gets more complex and compact and data rate gets higher. DDR3 and DDR4 data rate is increasing from 800MT/s to possibly 3200MT/s.

Application Note 2012-01-31

PDF PDF 1.40 MB

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