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Digital Design & Interconnect Standards

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - Insights for your best design

Learn more about Digital Design & Interconnect solutions from Keysight. 

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Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, and 2-Port TDR - Application Note 
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

Notes d’application 2015-10-29

Boosting PLL Design Efficiency From free-running VCO characterizations to closed-loop PLL evaluation 
This application note describes introduces practical solutions for VCO/PLL performance evaluation and gives actual examples of parameter measurements using the E5052B.

Notes d’application 2008-11-21

Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process 
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

Notes d’application 2008-11-20

Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS - Application Note 
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.

Notes d’application 2007-02-21

Using Clock Jitter Analysis to Reduce BER in Serial Data Applications 
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.

Notes d’application 2006-12-01

Limitations and Accuracies of Time and Frequency Domain Analysis of Physical Layer Devices 

Notes d’application 2005-11-01