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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more

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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P - Application Note 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

應用手冊 2015-04-24

PDF PDF 2.22 MB
USB Design and Test - A Better Way - Application Note 
Brochure covering Keysight's USB 2.0 and 3.0 test solutions portfolio and applications, discussing measurement challenges and showing how the test solutions and services address these.

應用手冊 2014-07-31

Measuring Jitter in Digital Systems (AN 1448-1) - Application Brief 
This application note is for R&D designers and engineers working on high-speed digital designs. It addresses jitter measurements in digital circuits, how the different measurement techniques are best applied, and how these decisions may change as the data rates increase.

應用手冊 2013-09-16

PDF PDF 1.78 MB
How to Test a MIPI M-PHY High-speed Receiver - Challenges and Keysight Solutions - Application Note 
This application selectively describes critical parts of the MIPI M-Phy-specification and related receiver (RX) tests. It describes the main properties of the M-Phy interface.

應用手冊 2013-08-06

PDF PDF 6.63 MB
How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification - Application Brief 
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.

應用手冊 2011-11-30

Advanced Techniques for PCIe 3.0 Receiver Testing-Paper - Application Note 
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper

應用手冊 2011-09-01

PDF PDF 2.20 MB
Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0 - Application Note 
This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0.

應用手冊 2011-06-22

執行PCI Express Revision 2接收器(RX)抖動容忍度測試 
執行PCI Express Revision 2接收器(RX)抖動容忍度測試

應用手冊 2009-05-18

PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse - Application Note 
Receiver Testing With J-BERT N4903A and 81150A Pulse

應用手冊 2008-12-03

PDF PDF 1000 KB
Upgrade to PCI Express 2.0© Receiver Test - Application Note 
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.

應用手冊 2008-10-24

PDF PDF 348 KB
Benefits of using PCI Express 2.0. - Application Note 
An overview of the main features and benefits of using PCI Express 2.0

應用手冊 2008-10-17

PDF PDF 764 KB
Method of Implementation (MOI) for DisplayPort Sink Compliance Test - Application Note 
Method of Implementation (MOI) for DisplayPort Sink Compliance Test

應用手冊 2008-08-18

PDF PDF 1.87 MB
Calibrating optical stress signals for characterizing 10 Gb/s optical transceivers - App Note 
Calibrating optical stress signals for characterizing 10 Gb/s optical transceivers

應用手冊 2008-06-10

Method of Implementation (MOI) for DisplayPort - Application Note 
Keysight Method of Implementation (MOI) for DisplayPort Sink Compliance Tests

應用手冊 2007-11-03

PDF PDF 1.99 MB
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY) 
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)

應用手冊 2007-07-30

PDF PDF 611 KB
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices - App Note 
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices

應用手冊 2007-06-19

PDF PDF 214 KB
Automated USB 2.0 Receiver Compliance Test and Characterization with the Keysight N5990A - App Note 
Automated USB 2.0 Receiver Compliance Test and Characterization with the Keysight N5990A Software Platform: 8 pages

應用手冊 2007-01-31

PDF PDF 272 KB
HDMI Sink and Source Compliance Test and Characterization - Application Note 
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.

應用手冊 2006-10-27

PCI Express Receiver Design Validation Test with 81134A / 81250A - Application Note 
Describes functional validation and compliance and stress tests for PCI Express receiver design

應用手冊 2005-03-18

Jitter Analysis Techniques for High Data Rates (AN 1432) - Application Note 
This new application note describes the basic jitter measurements and the specific measurement techniques used in SONet/SDH/OTN and Gigabit Ethernet applications.

應用手冊 2003-02-03