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Digital Design & Interconnect Standards

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - Insights for your best design

Learn more about Digital Design & Interconnect solutions from Keysight. 

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1-25 of 47

How to Test USB Type-C Alt Mode and the Standards Running Across It - Application Note 
This application note discusses how Alt mode works with power delivery circuitry to transmit/receive unique data signals/more power, so Type-C can be used for many USB & non-USB, device connections/control.

Application Note 2016-04-29

How to Test USB Power Delivery (PD) Over Type-C - Application Note 
USB Type-C power delivery creates possibilities for USB connected devices with higher, bi-directional power and power for non-USB devices with ALT mode. Learn more about verification/compliance.

Application Note 2016-04-26

How to Ensure Interoperability and Compliance of USB Type-C™ Cables and Connectors- Application Note 
Integrating USB Type-C into products, while ensuring interoperability and compliance, is challenging. This measurement brief covers USB Type-C cable and connector design and test solutions.

Application Note 2016-02-29

Boundary Scan DFT Guidelines for Good Chain Integrity and Test Coverage - Application Note 
This application note provides some key guidelines to enable good design for testability using boundary scan.

Application Note 2016-01-21

Configuring Lattice BSCAN2 Scan Path Linker on Keysight x1149 Boundary Scan Analyzer - App Note 
A boundary scan linker mux device links multiple boundary scan chains into one single chain or multiple chain configurations. Find out how to configure Lattice BSCAN2 scan path linkers in this paper.

Application Note 2015-10-30

Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, and 2-Port TDR - Application Note 
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

Application Note 2015-10-29

Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P - Application Note 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

Application Note 2015-04-24

Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity - Application Note 
Make the most accurate digital measurements by learning how to evaluate oscilloscope sample rates vs. signal fidelity.

Application Note 2014-12-16

USB 2.0 Compliance Testing with Infiniium Oscilloscopes - Application Note 
This Application Note discusses the solution for the USB 2.0 test suite. The Keysight solution is the only one-box solution that uses the official USB-IF scripts for precompliance ans compliance testing.

Application Note 2014-08-03

SATA II Drive TX/RX Testing & Cable SI Testing Using the 86100C DCA-J - Technical Overview 
SATA II Drive Tx/Rx Testing & Cable SI Test using 86100C DCA-J. Product Note 86100-8

Application Note 2014-08-02

An Overview of the Electrical Validation of 10BASE-T, 100BASE-TX, and 1000BASE-T - Application Note 
The technology used in these ports, commonly known as “LAN” or “NIC” ports, is usually one of the 10BASE-T, 100BASE-TX, and 1000BASE-T standards or a combination of them.

Application Note 2014-08-01

USB Design and Test - A Better Way - Application Note 
Brochure covering Keysight's USB 2.0 and 3.0 test solutions portfolio and applications, discussing measurement challenges and showing how the test solutions and services address these.

Application Note 2014-07-31

Digital Communication Analyzer (DCA), Measure Relative Intensity Noise (RIN) - Application Note 
Digital Communication Analyzer (DCA), Measure Relative Intensity Noise (RIN).

Application Note 2014-07-31

High Precision Time Domain Reflectometry - Application Note 
Time domain reflectometry (TDR) is a well-established technique for verifying the impedance and quality of signal pats in components, interconnects, and transmission lines.

Application Note 2014-01-23

Measuring Jitter in Digital Systems (AN 1448-1) - Application Brief 
This application note is for R&D designers and engineers working on high-speed digital designs. It addresses jitter measurements in digital circuits, how the different measurement techniques are best applied, and how these decisions may change as the data rates increase.

Application Note 2013-09-16

How to Test a MIPI M-PHY High-speed Receiver - Challenges and Keysight Solutions - Application Note 
This application selectively describes critical parts of the MIPI M-Phy-specification and related receiver (RX) tests. It describes the main properties of the M-Phy interface.

Application Note 2013-08-06

Jitter Measurements on Long Patterns Using 86100DU-401 Advanced Waveform Analysis - Application Note 
To overcome pattern length limitations found in many of today’s jitter analysis tools, Keysight developed a Microsoft Office Excel-based application called 86100DU Option 401 Advanced Waveform Analysis

Application Note 2013-02-21

Techniques to Reduce Manufacturing Cost-of-Test of Optical Transmitters, Flex DCA Interface 
Keysight continues innovating test methodologies to assist manufacturing engineers in meeting or beating cost-of-test reduction goals.

Application Note 2011-12-22

How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification - Application Brief 
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.

Application Note 2011-11-30

PCI Express Transmitter Electrical Validation and Compliance Testing - Application Note 
This application note is intended for digital designers and developers validating electrical performance of PCI Express-based designs and working toward electrical compliance of PCI Express products.

Application Note 2011-10-28

Techniques for Higher Accuracy Optical Measurements - Application Note 
Learn techniques for high accuracy optical measurements using System Impulse Response Correction

Application Note 2011-09-21

Advanced Techniques for PCIe 3.0 Receiver Testing-Paper - Application Note 
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper

Application Note 2011-09-01

Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0 - Application Note 
This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0.

Application Note 2011-06-22

PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse - Application Note 
Receiver Testing With J-BERT N4903A and 81150A Pulse

Application Note 2008-12-03

Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process 
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

Application Note 2008-11-20

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