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数字设计和互连标准

数字标准的每次更新换代都会让您的前进道路变得更加崎岖。我们在开发新产品以及与您这样的工程师协作时,对此深有体会。是德科技高速数字测试解决方案系列在我们与业界专家长期合作的基础上,将先进的仪器与广泛的专业技术完美结合。通过分享我们的最新经验,我们可以帮助您预测挑战,加快创造卓越的产品。

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Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

内部通讯 2016-11-01

 
8 Steps to a Successful DDR4 Design 
Learn how Keysight's design flow example for DDR4 can help you achive confidence in your design and help you ensure success.

期刊 2016-10-20

 
A Quick Fix for Poor Capacitor, Inductor and DC/DC Impedance Measurements  
Modern Test & Measure article by Steve Sandler (Picotest) explains why you need an extended range, partial S2p measurement and how to make this improved measurement.

文章 2016-10-03

 
Best Practices for Connector Models 
Eric Bogatin, Signal Integrity Journal Editor, discusses best practices for connector modeling and measuring with Heidi Barnes, Keysight ADS application engineering specialist, and Jim Nadolny, Principle SI Engineer for Samtec.

文章 2016-09-30

 
Correlating simulation and measurement for a USB Type-C reference channel (Part 1) 
This article from Electronic Products discusses a step-by-step process that signal integrity engineers can follow to ensure their success in designing with USB Type-C devices.

文章 2016-09-21

 
Follow Keysight EEsof EDA on Twitter! 
Twitter enables you to keep current on news and updates with Keysight EEsof through the exchange of quick, frequent answers to one simple question: What are you doing?

内部通讯 2016-07-14

 
是德科技表征 28 Gb/s 收发信机的技巧和先进技术 
是德科技表征 28 Gb/s 收发信机的技巧和先进技术

文章 2016-05-19

PDF PDF 3 MB
Signal Integrity Tips and Techniques Using TDR, VNA and Modeling - Article Reprint  
Time and frequency domain analyses for simulation and measurements provide quick solutions for characterizing signal losses and identifying elements that control performance.

文章 2016-03-31

PDF PDF 644 KB
The PDN Bandini Mountain and Other Things I Didn’t Know I Didn’t Know 
"In engineering, it's what you don't know you don't know that can ruin your day and keep you awake at nights." From Bert Simonovich's practical design notes.

期刊 2016-03-30

 
Solving Electronics Design Challenges of an Aerospace System with EDA Tools  
Microwave Product Digest featured article on solving electronics design challenges of an aerospace system using EDA tools.

文章 2016-03-22

 
Minimizing Design Risk, Shortening Development Time of a Digital Transmission System 
Powerful design and simulation software provides valuable insights to help uncover and solve difficult design challenges at every stage of the design process.

案例分析 2015-12-15

PDF PDF 1.17 MB
Keysight EEsof EDA makes it easy to get back to school—at least virtually 
Rick Nelson, executive editor of Evaluation Engineering, visited Keysight Technologies and had this to say about Keysight EEsof EDA.

文章 2015-09-11

 
Challenges extend from simulation to compliance 
Tami Pippert, Keysight Technologies’ high-speed digital marketing program manager, elaborates on how Keysight is enhancing its model generation, simulation, and data analysis technologies.

文章 2015-07-08

 
Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies - Articl 
This DesignCon 2014 paper presents case studies for model-to-model & model-to-lab correlation methods & compares favorable/unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

文章 2015-04-02

PDF PDF 3.34 MB
PCI Express Receiver Testing Responds To New Challenges - Article 
PCI Express Receiver Testing Responds To New Challenges

文章 2015-03-24

 
Touchstone v2.0 SI/PI S-Parameter Models for Simultaneous Switching Noise (SSN) Analysis of DDR4 
This article reprint presents a methodology to setup and analyze Simultaneous Switching Noise for DDR4 applications using Touchstone v2.0 models.

文章 2014-08-04

PDF PDF 8.20 MB
Mechanism of Jitter Amplification in Clock Channels 
In this paper. jitter amplification in clock channels is analyzed analytically using the techniques developed in "Frequency domain analysis of jitter amplification in clock channels."

文章 2014-08-04

PDF PDF 715 KB
IBIS AMI Modeling of Retimer and Performance Analysis of Retimer based Active Serial Links 
This paper presents a novel retimer modeling approach based on IBIS-AMI to capture the performance of a retimer that operates up to 15 Gbps.

文章 2014-08-04

PDF PDF 1.88 MB
Modeling, Extraction and Verification of VCSEL Model for Optical IBIS AMI 
A technique of modeling and extraction of VCSEL devices for IBIS-AMI has been proposed.

文章 2014-08-04

PDF PDF 1.18 MB
De-Mystifying the 28 Gb/s PCB Channel: Design to Measurement 
This paper demonstrates a design methodology for 28 Gb/s SERDES channels using Xilinx Virtex-7 Tx to show the required trade-offs that enable robust performance that is easy to verify with measurement.

文章 2014-08-04

PDF PDF 2.84 MB
Practical Analysis of Backplane Vias - White Paper 
This paper describes the methodology of using measurements on a test vehicle to build a high bandwidth, scalable model of long vias which includes the through and stub effects which can be used for system simulation.

案例分析 2014-07-31

PDF PDF 4.57 MB
Jitter Analysis: The Dual-Dirac Model, RJ/DJ, and Q-Scale - Application Note 
This paper provides a complete description of the dual-Dirac model, how it is used in technology standards and a summary of how it is applied on different types of test equipment.

文章 2014-06-14

PDF PDF 515 KB
Tips and Advanced Techniques for Characterizing a 28 Gb/s Transceiver 
This paper shows the right combination of measurement and simulation techniques, and how the previously existing barriers for using de-embedding have been eliminated.

文章 2014-02-18

PDF PDF 3.82 MB
Partner article using ADS: Practical Fiber Weave Effect Modeling -- Lamsim Enterprises, Inc. 
Partner article using ADS: Practical Fiber Weave Effect Modeling -- Lamsim Enterprises, Inc.

文章 2011-01-11

 
S-parameters Without Tears 
This article explains s-parameter theory and shows how to create accurate, delay-causal, and passive time-domain models by combining band-limited s-parameter data with knowledge about the physical characteristics of a component.

期刊 2010-01-25

 

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