The W1461 SystemVue Comms Architect dramatically cuts design time and verification effort for System Architects and Algorithm Developers doing communications system design and aerospace/defense systems at the physical layer (PHY).
SystemVue combines an easy to use environment with native polymorphic modeling and proprietary simulation technology to create an enhanced electronic system-level (ESL) design flow that “speaks RF”. SystemVue allows rapid investigation and creation of algorithms and signal processing architectures, as well as rapid prototyping, verification, and re-use, all the way from math fragment to live test equipment. SystemVue therefore helps system designers in aerospace/defense and commercial wireless turn their physical layer concepts into proven designs faster and with higher confidence than was possible before.
Additional modules in the SystemVue product family enhance the core environment to deeper insights and application knowledge, to create a PHY design powerhouse.
The W1461 SystemVue Comms Architect is the foundation module in the SystemVue product family. Other modules may be added to this environment as pieces, or application-oriented bundles provide superior value for RF, FPGA, and enterprise needs.
Figure 1. SystemVue unites Baseband modeling, RF effects, PHY reference IP, and links to Test in a single system-level cockpit for physical-layer design.
W1461 SystemVue Comms Architect core platform
The W1461 SystemVue Comms Architect core platform includes:
- Easy to use, multi-threaded application for 32-bit or 64-bit Windows®
- Polymorphic design entry supports “model-based design” flow (GUI blocks, language-based C++ or math, VHDL, Verilog)
- Easily encapsulate existing IP from a variety of formats into one flow, permitting line-by-line debug across multiple tools and domains
- Scripting, graphs and file I/O streamline verification tasks
- Priced and licensed attractively for networked workgroups
Custom C++ model development interface
- Build floating-point and fixed-point models in C++
- Debug models using standard familiar Microsoft® Visual Studio® 2010 interface
- Use code generation to export Win32 DLL models to other applications, including Keysight ADS
Native math language and debugger
- Native support for hundreds of comms-oriented math functions, syntax
- Text and GUI interfaces for easy model creation, simulation and verification
- Familiar command-line interface, interactive debugger and TCP/IP links
- Direct integration of MATLAB as a supplemental equation parser
High-performance dataflow simulation engine
- Supports Timed Synchronous Dataflow and Dynamic Dataflow with complex RF envelope carriers that preserve RF effects in high-performance modern PHYs
- Advanced Scheduler with native Multi-Rate allows complex topologies
- Multi-threaded for faster simulation on multi-core CPUs
- Supports remote simulation and distributed computing on Linux compute clusters with option W1711 and W1712 modules
- Free co-simulation with external applications, such as MATLAB, Aldec Riviera-PRO, Mentor Questa, and SystemC
- Optimization, Monte Carlo, and Statistical simulation modes
Model physical layer effects with versatile block sets
- Approximately 300 simulation blocks for RF, DSP, and Comms included in the base platform
- Handles analog effects such as phase noise, S-parameters, zero IF DC offsets, frequency-dependence, and more (Additional support for X-parameters* and GoldenGate “fast-envelope” model is available through the W1719 option)
- Includes free blocksets and reference sources for signal generation of OFDM, Zigbee, and approximately 40 digital modulation formats (compare to 89600 “AYA” option)
Links to measurement and hardware verification
- SCPI and IVI instrument interaction over TCP/IP embedded directly within dataflow simulations, or from a command line (see figure 3, below)
Direct run-time simulation support and waveform download to Keysight source families:
- Wideband AWG: M8190A, 81180A, M9330A, N6030A, N8241A
- RF sources: MXG family (N5182B), ESG family (E443xC series), N8267D PSG, and others)
- Modular PXI: M9381A, M9391A
- Built-in “Waveform Sequence Composer” utility interacts directly with the waveform segment memories of M8190A AWG and M9381A VSG, and supports the Digital Upconversion (DUC) option for the M8190A.
- Re-use verification set-ups, scripts, test vectors, and wireless IP as you move from algorithm to test
- SystemVue environment works well with other Keysight software applications, including FlexDCA, 89600 VSA, I/O Libraries, Command Expert, and Signal Studio
Digital filter synthesis
- Direct analysis and implementation of floating-point or fixed-point FIR filters
- FIR, IIR and analog communications filter types
- Instantiate filters directly from system-level blocks with a mouse click
Figure 2. The W1461BP SystemVue core environment provides convenient system-level modeling and links to test equipment. To this foundation, the user can add 3 design flow options for C++, HDL, and RF system architectures, or any of 13 baseband reference libraries for advanced applications and wireless standards.
Figure 3. SystemVue’s versatile system-level modeling connects easily to test instruments, allowing creative modeling and verification of communications physical layer (PHY) architectures. The “model-based design” paradigm can extend beyond Baseband DSP to include RF and Test domains, for earlier design validation.
The W1461 SystemVue Comms Architect is the base environment, and is included in all other bundles:
Additionally, Keysight N6171A MATLAB software configurations are also optionally available with any SystemVue environment.
Follow the link below to view all SystemVue configurations:
* "X-parameters" is a trademark of Keysight Technologies, Inc. The X-parameter format and underlying equations are open and documented. For more information click here.