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Bit Error Ratio Test (BERT) Solution

Make the next leap forward with Keysight BERTs!

Keysight offers the broadest choice of BERTs - covering affordable manufacturing test and high-performance characterization and compliance testing up to 32 Gb/s

Keysight's Bit Error Ratio Test solutions allow the most accurate and efficient design verification, characterization, compliance and manufacturing test of high-speed communication ports for today's ASICs, components, modules and line-cards in the semiconductor, computer, storage and communication industry.

Keysight offers the broadest portfolio with four BERT families that address a variety of speed classes, usability concepts, and flexibility as well as application specific stimulus and analysis tools. All BERTs provide cost-effective and efficient in-depth insight into critical measurement tasks for today's and next generation devices with gigabit interfaces.

BERTs are used to test and characterize many high-speed digital interfaces:

QPI, FB-DIMM, PCI Express®, SATA,/SAS USB, Thunderbolt, DisplayPort, HDMI, MHL, MIPI, UHS-II, Fibre Channel, XAUI/10Gb Ethernet, CAUI/100GbE, CEI and other backplanes, XFI/XFP/SFP+/CFP modules, OTN, and PON-OLTs, Serdes, DAC, ADC, etc.

 

Device
under test

Bit rate Application
examples
Typical
requirements
Recommended
Keysight BERT/AWG
For R&D
Characterization, Compliance
For Manufacturing

High-speed serial
receiver in computer buses and backplanes

<16G QPI, PCI Express, SATA,
SAS, USB3, TBT, DP, SD,
UHS II, MIPI D-PHY/ M-PHY,
HDMI
 
data rates < 16 Gb/s,
calibrated jitter, SSC, ISI and S.I.,
clock recovery, pattern sequencing
J-BERT M8020A (N4903B)
M8030A * or ParBERT 81250*
n/a
<10G MIPI D-PHY/ C-PHY
HDMI, MHL
data rates < 10G, no loopback,
3-wire or multi-level
M8190A, M8195A n/a

Backplanes, Cables,
SERDES, AOC,
Repeaters

>10G -28G 10Gbase-KR4/-CR4,
CEI, IB, TBT
CAUI, CAUI 2/4
10Gbase-KR
data rates > 10 Gb/s, de-emphasis,
x-talk, PRBS
J-BERT M8020A, M8062A, N4960A, N4965A, (J-BERT N4903B/N4877A) n/a
<58G CEI-56G/112G,
400GbE
PAM-4, NRZ, PRBS M8040A n/a
Optical transceivers
and sub-components:
0.6 to 58Gb/s
<58G 400GbE, 64G FC PAM-4, NRZ, PRBS M8040A  
<28G 40G/100GbE,
32G FC,
CFP2/4
data rates > 16Gb/s
clean signals,
PRBS
N4960A, N4967A
J-BERT M8020A+M8062A
(N4903B+M8061A+N4877A)
N4960A, N4967A
10G 10G/40GbE, PON,
OTN,
8G/16G FC,
QSFP, SFP+, QFP

data rates 3 to 15Gb/s,
PRBS optical stress & sensitivity,
framed bursts

J-BERT M8020A, (N4903B+N4917A),
M8030A* or ParBERT*
N2101B,
N4906B-012,
N4962A
<4G 1GbE, XFP,
PON,
1G/2G/4G FC
data rates
< 3.5Gb/s,
fast bit synchronization, PRBS or framed bursts
N4906B-003,
ParBERT 3.3G
N5980A,
ParBERT

*for multi-lane
** up to 4 lanes

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Insights for your best design
Cut through the challenges of gigabit digital designs with these useful tools, app notes, and seminars. Keysight - insights for your best design.

Promotional Materials 2014-03-30

J-BERT M8020A showing UI, jitter injection & de-emphasis – Video
This video gives an overview about the J-BERT M8020A high-performance BERT, including a demo of the jitter injection and de-emphasis capabilities, the user interface and the analyzer functionality.

Demo 2014-03-20

Press Releases for M8000 Series
New M8000 Series of BER Test Solutions

Press Materials 2014-03-18

N4960A Serial BERT 17 and 32 Gb/s - Data Sheet
The N4960A is the world's most affordable solution for characterizing 100GbE, 28G, and high speed SerDes applications.

Data Sheet 2014-02-05

Video for J-BERT M8020A High performance BERT
View the new video to see how the new J-BERT M8020A helps to master your designs.

Demo 2014-01-28

Agilent Technologies Introduces HDMI 2.0 Compliance Test Software for Transmitters and Receivers
Agilent Technologies Inc. (NYSE: A) today introduced two compliance test software packages for physical-layer testing of devices that use the new High-Definition Multimedia Interface (HDMI) 2.0 specification.

Press Materials 2014-01-14

Demystify MIPI M-PHY receiver physical layer test challenges – Webcast
For design, test and validation engineers who need to characterize and validate compliance of their MIPI designs.

Article 2013-11-15

J-BERT N4903B High-Performance Serial BERT - User's Guide
The Serial BERT can help you test the performance of components and systems for high-speed digital transmission equipment. An important parameter of a digital system is the rate at which errors occur in the system. The analyzer will compare the bits sent to your device with the bits received from your device. It will record the number of bit errors and display results such as the bit error ratio (BER). In addition, accumulated results can be analyzed to help you determine what caused the bit errors.

User Manual 2013-11-01

N4903B J-BERT - Getting Started Guide
Revision 11 (Released with N4903B Software 7.50).

Quick Start Guide 2013-11-01

J-BERT N4903B High-Performance Serial BERT - Programming Guide
This document provides the information you need for programming the Serial BERT using the Keysight IO Libraries Suite. Familiarity with the Keysight IO Libraries Suite is instrumental in understanding remote programming of the Serial BERT. See the user documentation delivered with the Keysight IO Libraries Suite for information on how to use them.

Programming and Syntax Guide 2013-11-01

Measuring Jitter in Digital Systems (AN 1448-1) - Application Brief
This application note is for R&D designers and engineers working on high-speed digital designs. It addresses jitter measurements in digital circuits, how the different measurement techniques are best applied, and how these decisions may change as the data rates increase.

Application Note 2013-09-16

PDF PDF 1.78 MB
N4967A Serial BERT System 40 Gb/s 40G BER test system (SB40B) - Data Sheet
The N4967A Serial BERT System operates at 40 Gb/s for device characterization, research and development testing, production testing, and general lab use.

Data Sheet 2013-09-05

How to Test a MIPI M-PHY High-speed Receiver - Challenges and Keysight Solutions - Application Note
This application selectively describes critical parts of the MIPI M-Phy-specification and related receiver (RX) tests. It describes the main properties of the M-Phy interface.

Application Note 2013-08-06

PDF PDF 6.63 MB
Overcome PCB Loss and Deliver a Clean Eye Using Keysight's 32Gb/s Pattern Generator
This video demonstrates the value of a pattern generator with integrated 5-tap de-emphasis when dealing with cable, connector, PCB board material, and other losses. With de-emphasis, the frequency-dependent loss can be compensated for and the test equipment can deliver a clean open eye to the DUT

Demo 2013-07-18

Press Releases for N4903B
Press Releases for N4903B

Press Materials 2013-07-16

Press Releases for N4877A
Press Releases for N4877A

Press Materials 2013-07-16

Press Releases for M8061A
Press Releases for M8061A

Press Materials 2013-07-16

Agilent Technologies Introduces 28.4-Gb/s Multiplexer with De-emphasis Option
Product Enables Accurate Characterization of Receivers Used in Servers, Storage Systems and Data-Center Networks

Press Materials 2013-07-16

Overcome PCB Loss, Deliver a Clean Eye to Your DUT Using Multi-tap De-emphasis - Application Brief
This application brief describes how Keysight’s 32 Gb/s Pattern Generator with integrated 5-tap de-emphasis can overcome PCB and connector loss and deliver a clean eye to the DUT.

Application Note 2013-07-16

N4983A Multiplexer and Demultiplexer - Data Sheet
The Keysight Technologies N4983A-M40 are broadband 4 to 1 multiplexers. The Keysight Technologies N4983A-D40 are 1 to 4 demultiplexers.

Data Sheet 2013-07-11

PDF PDF 2.35 MB
N4972A Clock Synthesizer 16 GHz - Data Sheet
The N4972A Clock Synthesizer operates from 500 MHz to 16 GHz with high-UI jitter injection capability.

Data Sheet 2013-07-11

Press Releases for N5990A
Press Releases for N5990A

Press Materials 2013-07-04

MOI for SATA RSG Tests, SATA Interoperability Program Rev. 1.5 - Application Note
Serial ATA Interoperability Program Revision 1.5 Keysight MOI for SATA RSG Tests

Application Note 2013-06-10

PDF PDF 2.45 MB
A Clock and Data Demultiplexer 44 Gb/s - Data Sheet
The N4968A Clock and Data Demultiplexer operates at 44 Gb/s and is designed to simplify high-bit rate BER measurements at half- or quarter-rate speeds.

Data Sheet 2013-06-03

PDF PDF 498 KB
Press Releases for N4916A
Press Releases for N4916A

Press Materials 2013-05-06

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